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 FDP33N25 250V N-Channel MOSFET
FDP33N25
250V N-Channel MOSFET Features
* 33A, 250V, RDS(on) = 0.094 @VGS = 10 V * Low gate charge ( typical 36.8 nC) * Low Crss ( typical 39 pF) * Fast switching * 100% avalanche tested * Improved dv/dt capability
UniFET
Description
July 2006
TM
These N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficient switched mode power supplies and active power factor correction.
D
G GDS
TO-220
FDP Series
S
Absolute Maximum Ratings
Symbol
VDSS ID IDM VGSS EAS IAR EAR dv/dt PD TJ, TSTG TL Drain-Source Voltage Drain Current Drain Current Gate-Source voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TC = 25C) - Derate above 25C
(Note 2) (Note 1) (Note 1) (Note 3)
Parameter
- Continuous (TC = 25C) - Continuous (TC = 100C) - Pulsed
(Note 1)
FDP33N25
250 33 20.4 132 30 918 33 23.5 4.5 235 1.89 -55 to +150 300
Unit
V A A A V mJ A mJ V/ns W W/C C C
Operating and Storage Temperature Range Maximum Lead Temperature for Soldering Purpose, 1/8" from Case for 5 Seconds
Thermal Characteristics
Symbol
RJC RCS RJA
Parameter
Thermal Resistance, Junction-to-Case Thermal Resistance, Case-to-Sink Thermal Resistance, Junction-to-Ambient
Min.
-0.5 --
Max.
0.53 -62.5
Unit
C/W C/W C/W
(c)2006 Fairchild Semiconductor Corporation
1
www.fairchildsemi.com
FDP33N25 Rev A
FDP33N25 250V N-Channel MOSFET
Package Marking and Ordering Information
Device Marking
FDP33N25
Device
FDP33N25
Package
TO-220
TC = 25C unless otherwise noted
Reel Size
-
Tape Width
-
Quantity
50
Electrical Characteristics
Symbol
Off Characteristics BVDSS BVDSS / TJ IDSS IGSSF IGSSR VGS(th) RDS(on) gFS Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd IS ISM VSD trr Qrr
NOTES:
Parameter
Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage Current, Forward Gate-Body Leakage Current, Reverse Gate Threshold Voltage Static Drain-Source On-Resistance Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge
Conditions
VGS = 0V, ID = 250A ID = 250A, Referenced to 25C VDS = 250V, VGS = 0V VDS = 200V, TC = 125C VGS = 30V, VDS = 0V VGS = -30V, VDS = 0V VDS = VGS, ID = 250A VGS = 10V, ID = 16.5A VDS = 40V, ID =16.5A VDS = 25V, VGS = 0V, f = 1.0MHz
(Note 4)
Min.
250 -----3.0 ------
Typ.
-0.25 -----0.077 26.6 1640 330 39 35 230 75 120 36.8 10 17
Max Units
--1 10 100 -100 5.0 0.094 -2135 430 59 80 470 160 250 48 --V V/C A A nA nA V S pF pF pF ns ns ns ns nC nC nC
On Characteristics
Dynamic Characteristics
Switching Characteristics VDD = 125V, ID = 33A RG = 25
(Note 4, 5)
------(Note 4, 5)
VDS = 200V, ID = 33A VGS = 10V
--
Drain-Source Diode Characteristics and Maximum Ratings Maximum Continuous Drain-Source Diode Forward Current Maximum Pulsed Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge VGS = 0V, IS = 33A VGS = 0V, IS = 33A dIF/dt =100A/s
(Note 4)
------
---220 1.71
33 132 1.4 ---
A A V ns C
1. Repetitive Rating: Pulse width limited by maximum junction temperature 2. L = 1.35mH, IAS = 33A, VDD = 50V, RG = 25, Starting TJ = 25C 3. ISD 33A, di/dt 200A/s, VDD BVDSS, Starting TJ = 25C 4. Pulse Test: Pulse width 300s, Duty Cycle 2% 5. Essentially Independent of Operating Temperature Typical Characteristics
FDP33N25 Rev A
2
www.fairchildsemi.com
FDP33N25 250V N-Channel MOSFET
Typical Performance Characteristics
Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics
10
2
VGS 15.0 V 10.0 V 8.0 V 7.0 V 6.5 V 6.0 V Bottom : 5.5 V Top :
10
2
ID, Drain Current [A]
10
1
ID, Drain Current [A]
10
1
150 C 25 C -55 C
* Notes : 1. VDS = 40V 2. 250s Pulse Test
o o
o
10
0
* Notes : 1. 250s Pulse Test o 2. TC = 25 C
-1
10
0
10
10
0
10
1
2
4
6
8
10
12
VDS, Drain-Source Voltage [V]
V GS, Gate-Source Voltage [V]
Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperatue
0.25
10
2
RDS(ON) [], Drain-Source On-Resistance
VGS = 10V
0.15
IDR, Reverse Drain Current [A]
0.20
10
1
0.10
150 C 25 C
o
o
VGS = 20V
0.05
* Note : TJ = 25 C
o
* Notes : 1. VGS = 0V 2. 250s Pulse Test
0.00
0
20
40
60
80
100
10
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
ID, Drain Current [A]
VSD, Source-Drain voltage [V]
Figure 5. Capacitance Characteristics
12
4000
Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd
Figure 6. Gate Charge Characteristics
VGS, Gate-Source Voltage [V]
Crss = Cgd
10
VDS = 50V VDS = 125V VDS = 200V
3000
Coss Ciss
8
Capacitances [pF]
2000
6
4
1000
Crss
* Note ; 1. VGS = 0 V 2. f = 1 MHz
2
* Note : ID = 33A
0 -1 10
0
10
0
10
1
0
10
20
30
40
VDS, Drain-Source Voltage [V]
QG, Total Gate Charge [nC]
FDP33N25 Rev A
3
www.fairchildsemi.com
FDP33N25 250V N-Channel MOSFET
Typical Performance Characteristics (Continued)
Figure 7. Breakdown Voltage Variation vs. Temperature
1.2
Figure 8. On-Resistance Variation vs. Temperature
3.0
BVDSS, (Normalized) Drain-Source Breakdown Voltage
1.1
RDS(ON), (Normalized) Drain-Source On-Resistance
2.5
2.0
1.0
1.5
1.0
* Notes : 1. VGS = 10 V 2. ID = 16.5 A
0.9
* Notes : 1. VGS = 0 V 2. ID = 250 A
0.5
0.8 -100
-50
0
50
100
o
150
200
0.0 -100
-50
0
50
100
o
150
200
TJ, Junction Temperature [ C]
TJ, Junction Temperature [ C]
Figure 9. Maximum Safe Operating Area
Figure 10. Maximum Drain Current vs. Case Temperature
40
10
2
10 s 100 s
ID, Drain Current [A]
10
1
Operation in This Area is Limited by R DS(on)
10 ms 100 ms DC
ID, Drain Current [A]
1 ms
30
20
10
0
* Notes : o 1. TC = 25 C 2. TJ = 150 C 3. Single Pulse
o
10
10
-1
10
0
10
1
10
2
0 25
50
75
100
o
125
150
VDS, Drain-Source Voltage [V]
TC, Case Temperature [ C]
Figure 11. Transient Thermal Response Curve
10
0
ZJC(t), Thermal Response
D =0.5
10
-1
0.2 0.1 0.05 0.02 0.01 single pulse
PDM t1 t2
10
-2
* N o te s : o 1 . Z JC (t) = 0 .5 3 C /W M ax. 2 . D u ty F a ctor, D = t 1 /t 2 3 . T JM - T C = P D M * Z JC (t)
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
t 1 , S q uare W ave P ulse D uration [sec]
FDP33N25 Rev A
4
www.fairchildsemi.com
FDP33N25 250V N-Channel MOSFET
Gate Charge Test Circuit & Waveform
Resistive Switching Test Circuit & Waveforms
Unclamped Inductive Switching Test Circuit & Waveforms
FDP33N25 Rev A
5
www.fairchildsemi.com
FDP33N25 250V N-Channel MOSFET
Peak Diode Recovery dv/dt Test Circuit & Waveforms
FDP33N25 Rev A
6
www.fairchildsemi.com
FDP33N25 250V N-Channel MOSFET
Mechanical Dimensions
TO-220
Dimensions in Millimeters
FDP33N25 Rev A
7
www.fairchildsemi.com
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. FACT Quiet SeriesTM GlobalOptoisolatorTM GTOTM HiSeCTM I2CTM i-LoTM ImpliedDisconnectTM IntelliMAXTM ISOPLANARTM LittleFETTM MICROCOUPLERTM MicroFETTM MicroPakTM MICROWIRETM MSXTM MSXProTM Across the board. Around the world.TM The Power Franchise(R) Programmable Active DroopTM DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD'S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.
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LIFE SUPPORT POLICY
FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS Definition of Terms
Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
Rev. I20


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